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   <div id="projectname">DM-CtrlH7-BF-DevProgram<span id="projectnumber">&#160;beta 0.1</span>
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<div class="header">
  <div class="headertitle"><div class="title">SPI Flags Definition <div class="ingroups"><a class="el" href="group___s_t_m32_h7xx___h_a_l___driver.html">STM32H7xx_HAL_Driver</a> &raquo; <a class="el" href="group___s_p_i.html">SPI</a> &raquo; <a class="el" href="group___s_p_i___exported___constants.html">SPI Exported Constants</a></div></div></div>
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<table class="memberdecls">
<tr class="heading"><td colspan="2"><h2 id="header-define-members" class="groupheader"><a id="define-members" name="define-members"></a>
Macros</h2></td></tr>
<tr class="memitem:ga9ba64b3cfed2459e105a1dd92dd52804" id="r_ga9ba64b3cfed2459e105a1dd92dd52804"><td class="memItemLeft" align="right" valign="top"><a id="ga9ba64b3cfed2459e105a1dd92dd52804" name="ga9ba64b3cfed2459e105a1dd92dd52804"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>SPI_FLAG_RXP</b>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#ga95289b0733d92829f9f0189574dc1d54">SPI_SR_RXP</a>     /* SPI status flag : Rx-Packet available flag                 */</td></tr>
<tr class="memitem:gaee1560c53486464ea55f6404d1e4e31e" id="r_gaee1560c53486464ea55f6404d1e4e31e"><td class="memItemLeft" align="right" valign="top"><a id="gaee1560c53486464ea55f6404d1e4e31e" name="gaee1560c53486464ea55f6404d1e4e31e"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>SPI_FLAG_TXP</b>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#ga9f7199bbdd797f0238aaaf9cc42e4f64">SPI_SR_TXP</a>     /* SPI status flag : Tx-Packet space available flag           */</td></tr>
<tr class="memitem:ga1fea08c99d7432f2179ed6eed7628df2" id="r_ga1fea08c99d7432f2179ed6eed7628df2"><td class="memItemLeft" align="right" valign="top"><a id="ga1fea08c99d7432f2179ed6eed7628df2" name="ga1fea08c99d7432f2179ed6eed7628df2"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>SPI_FLAG_DXP</b>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#ga73f785111c63d6e951018ebc0fffacf6">SPI_SR_DXP</a>     /* SPI status flag : Duplex Packet flag                       */</td></tr>
<tr class="memitem:ga1b76cc528b950514ee2432c456c73713" id="r_ga1b76cc528b950514ee2432c456c73713"><td class="memItemLeft" align="right" valign="top"><a id="ga1b76cc528b950514ee2432c456c73713" name="ga1b76cc528b950514ee2432c456c73713"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>SPI_FLAG_EOT</b>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#gadf6af11782cace2048e20c18d4d63e1a">SPI_SR_EOT</a>     /* SPI status flag : End of transfer flag                     */</td></tr>
<tr class="memitem:gaeba0c8020ffece1fc9f6ca27e2035935" id="r_gaeba0c8020ffece1fc9f6ca27e2035935"><td class="memItemLeft" align="right" valign="top"><a id="gaeba0c8020ffece1fc9f6ca27e2035935" name="gaeba0c8020ffece1fc9f6ca27e2035935"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>SPI_FLAG_TXTF</b>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#gac0e93a296bc722bab78d526bf1cc2f7d">SPI_SR_TXTF</a>    /* SPI status flag : Transmission Transfer Filled flag        */</td></tr>
<tr class="memitem:gabb6a58ae2fd5025950cab3d3a07e68af" id="r_gabb6a58ae2fd5025950cab3d3a07e68af"><td class="memItemLeft" align="right" valign="top"><a id="gabb6a58ae2fd5025950cab3d3a07e68af" name="gabb6a58ae2fd5025950cab3d3a07e68af"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>SPI_FLAG_UDR</b>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#ga13d3292e963499c0e9a36869909229e6">SPI_SR_UDR</a>     /* SPI Error flag  : Underrun flag                            */</td></tr>
<tr class="memitem:gab45264da2296c75495a7437a045513ea" id="r_gab45264da2296c75495a7437a045513ea"><td class="memItemLeft" align="right" valign="top"><a id="gab45264da2296c75495a7437a045513ea" name="gab45264da2296c75495a7437a045513ea"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>SPI_FLAG_OVR</b>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#gaa8d902302c5eb81ce4a57029de281232">SPI_SR_OVR</a>     /* SPI Error flag  : Overrun flag                             */</td></tr>
<tr class="memitem:ga30fb6af50e1f3c61cb9de76b0101c889" id="r_ga30fb6af50e1f3c61cb9de76b0101c889"><td class="memItemLeft" align="right" valign="top"><a id="ga30fb6af50e1f3c61cb9de76b0101c889" name="ga30fb6af50e1f3c61cb9de76b0101c889"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>SPI_FLAG_CRCERR</b>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#ga4c0cf2db0d5d372242e66e6d7da50b39">SPI_SR_CRCE</a>    /* SPI Error flag  : CRC error flag                           */</td></tr>
<tr class="memitem:ga27dd114d8adc70f1439c054289f9313a" id="r_ga27dd114d8adc70f1439c054289f9313a"><td class="memItemLeft" align="right" valign="top"><a id="ga27dd114d8adc70f1439c054289f9313a" name="ga27dd114d8adc70f1439c054289f9313a"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>SPI_FLAG_FRE</b>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#gaf3e3c940fb46d8b32456c59819e615be">SPI_SR_TIFRE</a>   /* SPI Error flag  : TI mode frame format error flag          */</td></tr>
<tr class="memitem:gac7d3525ab98cc18f02270a4dba685897" id="r_gac7d3525ab98cc18f02270a4dba685897"><td class="memItemLeft" align="right" valign="top"><a id="gac7d3525ab98cc18f02270a4dba685897" name="gac7d3525ab98cc18f02270a4dba685897"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>SPI_FLAG_MODF</b>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#gabaa043349833dc7b8138969c64f63adf">SPI_SR_MODF</a>    /* SPI Error flag  : Mode fault flag                          */</td></tr>
<tr class="memitem:gaa28a29f609dbcef512f258e5c72d84b0" id="r_gaa28a29f609dbcef512f258e5c72d84b0"><td class="memItemLeft" align="right" valign="top"><a id="gaa28a29f609dbcef512f258e5c72d84b0" name="gaa28a29f609dbcef512f258e5c72d84b0"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>SPI_FLAG_TSERF</b>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#ga5332b248a3daf660df7f13098e75da46">SPI_SR_TSERF</a>   /* SPI status flag : Additional number of data reloaded flag  */</td></tr>
<tr class="memitem:ga6a4b56fbf17d58ff9805441c5ab8a928" id="r_ga6a4b56fbf17d58ff9805441c5ab8a928"><td class="memItemLeft" align="right" valign="top"><a id="ga6a4b56fbf17d58ff9805441c5ab8a928" name="ga6a4b56fbf17d58ff9805441c5ab8a928"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>SPI_FLAG_SUSP</b>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#ga3294b6597873bd2c0f2acb9e722e18cc">SPI_SR_SUSP</a>    /* SPI status flag : Transfer suspend complete flag           */</td></tr>
<tr class="memitem:ga1646c5ebd8e683ff26afdf029fb57cf8" id="r_ga1646c5ebd8e683ff26afdf029fb57cf8"><td class="memItemLeft" align="right" valign="top"><a id="ga1646c5ebd8e683ff26afdf029fb57cf8" name="ga1646c5ebd8e683ff26afdf029fb57cf8"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>SPI_FLAG_TXC</b>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#ga1695e2f6e8d042aeae4d9f07e96dfe1a">SPI_SR_TXC</a>     /* SPI status flag : TxFIFO transmission complete flag        */</td></tr>
<tr class="memitem:ga4406c904711e73f41bfbc930bfc92d58" id="r_ga4406c904711e73f41bfbc930bfc92d58"><td class="memItemLeft" align="right" valign="top"><a id="ga4406c904711e73f41bfbc930bfc92d58" name="ga4406c904711e73f41bfbc930bfc92d58"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>SPI_FLAG_FRLVL</b>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#ga09c4e3cd9a199757d6f3ac06e5bc110f">SPI_SR_RXPLVL</a>  /* SPI status flag : Fifo reception level flag                */</td></tr>
<tr class="memitem:gad87f2b93de239ba67ad4bfdc2774defb" id="r_gad87f2b93de239ba67ad4bfdc2774defb"><td class="memItemLeft" align="right" valign="top"><a id="gad87f2b93de239ba67ad4bfdc2774defb" name="gad87f2b93de239ba67ad4bfdc2774defb"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>SPI_FLAG_RXWNE</b>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#gab6334377efffc8f2733962c827a4bf03">SPI_SR_RXWNE</a>   /* SPI status flag : RxFIFO word not empty flag               */</td></tr>
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<a name="details" id="details"></a><h2 id="header-details" class="groupheader">Detailed Description</h2>
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